Congratulations team. P1735 was approved as IEEE 1735-2014 today!
Many thanks to all of the contributors, working group members, and reviewers who have hung in there during this multiple-year effort.
Publication will take another 6-8 weeks and we will have an opportunity to review the final document before it is published.
The abstract is
Abstract: Distribution of electronic design intellectual property (EDIP) creates a risk of unsanctioned use and dilution of the investment in its creation. This standard provides guidance on technical protection measures to those who produce, use, process, or standardize the specifications of such electronics design descriptions. These measures include protection through encryption, specification, and management of use rights that have been granted by the producers of electronic designs and methods for integrating license verification for granted rights.
According to the introduction
This standard has been created to consolidate EDA industry efforts to unify the technical protections for EDIP, and to guide standards development organizations in aligning their work for interoperability and compatibility. It is also intended to share best practices in EDIP protection for those who use standards that incorporate such technology, such as VHDL (IEC/IEEE 61691-1-1 (IEEE Std 1076™)) and SystemVerilog (IEEE Std 1800™).