According to Paul McLellan in “Structured Asic Dies…Again”
The reality is that there seems to be a space for doing quick and easy designs even if the unit cost is high (FPGAs). Get to market fast, get traction. And there is a space for doing complex standard products that are sold to the general market. There is not a space for doing moderately hard designs at a moderately low unit price, especially if the volumes are low, nor for semi-automatically moving designs up the chain. It just doesn’t work smoothly enough and the next generation design is always more important than cost-reducing the last one.
I think by now it is safe to say that there isn’t really a sweet-spot between FPGAs and SoCs. […] It is the comparison in design methodology that is probably key: the FPGA methodology is fairly automatic, SoC requires $100Ms in design tools and the best designers in the world. There isn’t a gap in between.