“If anyone strikes you on the right cheek”: The day Martin Luther King was punched twice by a Nazi

According to Ron Rosenbaum interviewing MLK biographer Taylor Branch about his “battle to prevent Dr. King’s profoundly considered theory of nonviolence from being relegated to history, and not recognized for its relevance to the issues America and the world faces today”

King’s practice, Branch says, was complex and radical and has been often misunderstood. Some of his closest supporters had their doubts about King’s own commitment to nonviolence—whether it was “personal” or just an abstraction for him.

During a meeting of King’s Southern Christian Leadership Conference, a man rose up from the audience, leapt onto the stage and smashed King in the face. Punched him hard. And then punched him again.

After the first punch, Branch recounts, King just dropped his hands and stood there, allowed the assailant (who turned out to be a member of the American Nazi Party) to punch him again. And when King’s associates tried to step in King stopped them:

“Don’t touch him!” King shouted. “Don’t touch him. We have to pray for him.”

When the assailant started slugging King, most people thought, Branch says, that “it was a surprise part of the program. He walked up and slugged him and people still thought that this might be some sort of nonviolent demonstration or something. And then he hit him again!”

“Hit him hard?”

“Hit him hard! In fact, he couldn’t continue the rest of the convention. Knocked him around and finally people realized this was not a demonstration, that this was an emergency and went and dragged him out…and swarmed around this Nazi, and King is already saying, “‘Don’t touch him, don’t hurt him.’”

It was an important revelation, even for some of those who had been close to him for years. Even for Rosa Parks, the heroine of King’s first struggle, the Montgomery bus boycott. “Rosa Parks was quite taken by that,” Branch says, “because she always thought that nonviolence was an abstraction to King. She told him that she had never really seen it in him until that moment. And a number of other people did too.”

People still don’t quite believe in nonviolence in the radical way King did, though Branch thinks it’s the most important aspect of his legacy.

“You call nonviolence ‘an orphan,’” I say to him. “What do you mean by that?”

“The force behind the idea of nonviolence was given its most powerful run in the civil rights era. [Which showed] that it could have an effect in the world. But it became passé pretty quickly toward the end of Dr. King’s career.”


“Everybody was jettisoning nonviolence, black and white. White radicals sneered at it. Black Power people sneered at it. ‘Power comes out of the mouth of a gun,’ so on and so forth. And so it became passé pretty quickly even as a matter of intellectual investigation.”

Ironically, Branch says, “The only place I found that studied it in classrooms was in our war colleges, the Naval War College and West Point.”

According to Marcus Borg on the true meaning of “turn the other cheek”

According to Matthew 5:39-41, Jesus says:

If any one strikes you on the right cheek, turn the other also.

For much of Christian history, people have heard these verses as affirming political acquiescence, not active resistance. Yet King and Gandhi interpreted Jesus as justifying political action. Which interpretation was right? Recent Jesus scholarship suggests these verses are creative non-violent strategies of protesting oppression.

The key … is rigorous attention to the social customs of the Jewish homeland in the first century and what these sayings would have meant in that context.

To illustrate with the saying about turning the other cheek: it specifies that the person has been struck on the right cheek. How can you be struck on the right cheek? … You have to act this out in order to get the point: you can be struck on the right cheek only by an overhand blow with the left hand, or with a backhand blow from the right hand. (Try it).

But in that world, people did not use the left hand to strike people. It was reserved for “unseemly” uses. Thus, being struck on the right cheek meant that one had been backhanded with the right hand. Given the social customs of the day, a backhand blow was the way a superior hit an inferior, whereas one fought social equals with fists.

This means the saying presupposes a setting in which a superior is beating a peasant. What should the peasant do? “Turn the other cheek.” What would be the effect? The only way the superior could continue the beating would be with an overhand blow with the fist–which would have meant treating the peasant as an equal.

Perhaps the beating would not have been stopped by this. But for the superior, it would at the very least have been disconcerting: he could continue the beating only by treating the peasant as a social peer. … The peasant was in effect saying, “I am your equal. I refuse to be humiliated anymore.”

See also “MLK on true compassion and a revolution of values” and “No such thing as an unjust peace“.

A Verilog parameter infers its type from its value — the myth that there is a default signed integer parameter type in Verilog

Because it’s so common to assign a signed integer constant to a Verilog parameter

parameter SIZE = 8;

a myth has arisen that there is a default signed integer parameter type in Verilog.

But there is no default parameter type in Verilog. The type of a parameter (or a local parameter) is the type of whatever value is eventually assigned to it during elaboration. Override SIZE above with "four score and seven years ago" and its type becomes an unsigned vector of width 240.

Verilog 2001 (IEEE Std 1364-2001) added the ability to write

parameter integer SIZE = 8;

so that the right-hand side would instead be evaluated in the context of an assignment to a parameter of type integer. But that never caught on, because apparently it’s considered too painful to write integer after every parameter.

(An extra complication is that Verilog also has some half-way specifications you can add to parameters. For the horrible details, see the bottom of p. 694 in IEEE Std 1800-2012.)

When SystemVerilog extended the Verilog type system, it allowed any of those new types to be used after parameter. Most importantly here, it added an int type that is a 2-state version of integer.

If you are confident it’s only going to be a simple signed integer parameter value, such as #(.N(8)), then I guess even in SystemVerilog you could go ahead and still omit the explicit type from the parameter declaration, because it’s too painful to write the three extra characters int after every parameter.

But if I personally were defining a SystemVerilog coding guideline, I would insist on parameter int N = … or some other explicit type, instead of letting it depend on the type of the value.

parameter int SIZE = 8;

Nonblocking assignments (NBA) — the myth of Verilog parallel assignment

Because of examples like the following, which swaps the value of a and b

a <= b;
b <= a;

a misconception has arisen that Verilog nonblocking assignments (NBA) achieve parallel assignment. Instead, an NBA defers an assignment until late in the time step, but calculates immediately the value that is eventually to be assigned. So in the above example, the values of b and a are calculated when the NBAs are encountered, and are saved away until they are used later in the time step.

Consider instead a more realistic example, where the “parallel assignment” intuition breaks down.

memory[write_idx0] <= data0;
memory[write_idx1] <= data1;

Because write_idx0 and write_idx1 could be equal, priority logic is required so that the last write will win. And what would a “parallel assignment” mean anyway when these indices are equal? — Nondeterminism, multiple-writers, …? Defining parallel assignment is not an obvious thing, and the Verilog language standard does not attempt it within a sequential block.

Such examples get created when, through outside knowledge, the designer knows that the indices will never be equal, hence parallel assignment would be unproblematic. In SystemVerilog, an immediate assertion could be used to inform the tool of this fact, or with an extra loop, the unique0 case construct

foreach (memory[idx]) begin:parallel
  unique0 case(idx)
    write_idx0: memory[idx] <= data0;
    write_idx1: memory[idx] <= data1;

Write down where you’re at, before you take a break

I’ve subscribed to Sean Murphy’s blog for a long time, and so it felt good when he quoted me at length in “Preserve Context in Writing to Manage Interruptions“. With year-end breaks almost here for many workers in North America and Europe, I recommend reading that link. Write down enough context about what you’ve been doing that you can set your cares aside, focus on friends and family, and then easily pick up where you left off in the new year.

Slavery, capitalism, and the origins of the modern world

(Following up to “Slavery and the rise of the West — US Civil War was necessary for ending slavery“.) According to Sven Beckert

Slavery did not die because it was unproductive or unprofitable, as some earlier historians have argued. Slavery was not some feudal remnant on the way to extinction. It died because of violent struggle, because enslaved workers continually challenged the people who held them in bondage—nowhere more successfully than in the 1790s in the French colony of Saint-Domingue (now Haiti, site of the first free nation of color in the New World), and because a courageous group of abolitionists struggled against some of the dominant economic interests of their time.

New IEEE Std 1735-2014™ for “Recommended Practice for Encryption and Management of Electronic Design Intellectual Property (IP)”

According to Dave Graubart regarding the new IEEE Std 1735-2014™ for “Recommended Practice for Encryption and Management of Electronic Design Intellectual Property (IP)”

Congratulations team. P1735 was approved as IEEE 1735-2014 today!

Many thanks to all of the contributors, working group members, and reviewers who have hung in there during this multiple-year effort.

Publication will take another 6-8 weeks and we will have an opportunity to review the final document before it is published.

The abstract is

Abstract: Distribution of electronic design intellectual property (EDIP) creates a risk of unsanctioned use and dilution of the investment in its creation. This standard provides guidance on technical protection measures to those who produce, use, process, or standardize the specifications of such electronics design descriptions. These measures include protection through encryption, specification, and management of use rights that have been granted by the producers of electronic designs and methods for integrating license verification for granted rights.

According to the introduction

This standard has been created to consolidate EDA industry efforts to unify the technical protections for EDIP, and to guide standards development organizations in aligning their work for interoperability and compatibility. It is also intended to share best practices in EDIP protection for those who use standards that incorporate such technology, such as VHDL (IEC/IEEE 61691-1-1 (IEEE Std 1076™)) and SystemVerilog (IEEE Std 1800™).

SVA (SystemVerilog assertions) standards sub-committee to meet 18 November 2014 via audio conferencing

Update: The minutes are here. According to them

The general opinion at the last IEEE P1800 WG meeting was to have a “quiet” PAR with minimal number of changes. Main exceptions: work required to merge Verilog-AMS with SystemVerilog (mostly belongs to SV-DC subcommittee), and work required to support the standardization of UVM (P1800.2; mostly belongs to SV-EC subcommittee).

According to this invitation, the SV-AC will meet 1700 UTC on 18 November 2014 (via audio conferencing) to prepare recommendations for the scope of a revision Project Authorization Request (PAR) for P1800.

As discussed here, a meeting of the full P1800 will probably be scheduled in or around the March 2015 DVCon in Silicon Valley. But, in the meantime, sub-committees are free to meet to prepare their recommendations about scope.

Because the P1800 uses the IEEE-SA “Entity Standards Development Process”, any employee of an IEEE-SA Advanced Corporate Member is eligible to participate in the 18 November meeting.